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3a. State the following i. Distributive Law ii. Absorptive Law iii. Associative Law b. Design a digital counter to sequence through the following numbers using JK flip flop 0, 2, 4, 3, 6, 7, 0 c. Briefly explain what is meant by flip flop

Computer Science

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Here's the solution for question 3:

Part a(i)

The Distributive Law states that

A⋅(B+C)=(A⋅B)+(A⋅C)A \cdot (B + C) = (A \cdot B) + (A \cdot C) A+(B⋅C)=(A+B)⋅(A+C)A + (B \cdot C) = (A + B) \cdot (A + C)

Part a(ii)

The Absorptive Law states that

A+(A⋅B)=AA + (A \cdot B) = A A⋅(A+B)=AA \cdot (A + B) = A

Part a(iii)

The Associative Law states that

(A+B)+C=A+(B+C)(A + B) + C = A + (B + C) (A⋅B)⋅C=A⋅(B⋅C)(A \cdot B) \cdot C = A \cdot (B \cdot C)

Part b· 4 steps

To design a digital counter for the sequence 0, 2, 4, 3, 6, 7, 0 using JK flip-flops, we first determine the number of flip-flops needed. The maximum number in the sequence is 7, which requires 3 bits (1112111_2). Thus, we will use three JK flip-flops, let's call their outputs QC,QB,QAQ_C, Q_B, Q_A (most significant to least significant bit).

  1. State Table and Excitation Table

    We list the present states, next states, and determine the required JK inputs for each flip-flop using the JK flip-flop excitation table (Qn→Qn+1Q_n \to Q_{n+1}: 0→0  ⟹  J=0,K=x0 \to 0 \implies J=0, K=x; 0→1  ⟹  J=1,K=x0 \to 1 \implies J=1, K=x; 1→0  ⟹  J=x,K=11 \to 0 \implies J=x, K=1; 1→1  ⟹  J=x,K=01 \to 1 \implies J=x, K=0).

    Present State (QCQBQAQ_C Q_B Q_A)Next State (QC+QB+QA+Q_C^+ Q_B^+ Q_A^+)JCJ_CKCK_CJBJ_BKBK_BJAJ_AKAK_A
    0000100x1x0x
    0101001xx10x
    100011x11x1x
    0111101xx0x1
    110111x0x01x
    111000x1x1x1
  2. K-Maps for JK Inputs

    We use K-maps to simplify the expressions for each JK input. Unused states (001, 101) are treated as don't cares (x).

    JCJ_C K-map:

    QCQB∖QA0001111000x111xxxx\begin{array}{|c|c|c|c|c|} \hline Q_C Q_B \setminus Q_A & 00 & 01 & 11 & 10 \\ \hline 0 & 0 & x & 1 & 1 \\ \hline 1 & x & x & x & x \\ \hline \end{array}

    Grouping: JC=QC‾QBJ_C = \overline{Q_C} Q_B

    KCK_C K-map:

    QCQB∖QA000111100xxxx11x10\begin{array}{|c|c|c|c|c|} \hline Q_C Q_B \setminus Q_A & 00 & 01 & 11 & 10 \\ \hline 0 & x & x & x & x \\ \hline 1 & 1 & x & 1 & 0 \\ \hline \end{array}

    Grouping: KC=QCQB‾+QCQA=QC(QB‾+QA)K_C = Q_C \overline{Q_B} + Q_C Q_A = Q_C (\overline{Q_B} + Q_A)

    JBJ_B K-map:

    QCQB∖QA0001111001xxx11xxx\begin{array}{|c|c|c|c|c|} \hline Q_C Q_B \setminus Q_A & 00 & 01 & 11 & 10 \\ \hline 0 & 1 & x & x & x \\ \hline 1 & 1 & x & x & x \\ \hline \end{array}

    Grouping: JB=QA‾J_B = \overline{Q_A}

    KBK_B K-map:

    QCQB∖QA000111100xx011xx10\begin{array}{|c|c|c|c|c|} \hline Q_C Q_B \setminus Q_A & 00 & 01 & 11 & 10 \\ \hline 0 & x & x & 0 & 1 \\ \hline 1 & x & x & 1 & 0 \\ \hline \end{array}

    Grouping: KB=QCQA+QC‾QA‾K_B = Q_C Q_A + \overline{Q_C} \overline{Q_A}

    JAJ_A K-map:

    QCQB∖QA0001111000xx011xx1\begin{array}{|c|c|c|c|c|} \hline Q_C Q_B \setminus Q_A & 00 & 01 & 11 & 10 \\ \hline 0 & 0 & x & x & 0 \\ \hline 1 & 1 & x & x & 1 \\ \hline \end{array}

    Grouping: JA=QCJ_A = Q_C

    KAK_A K-map:

    QCQB∖QA000111100xx1x1xx1x\begin{array}{|c|c|c|c|c|} \hline Q_C Q_B \setminus Q_A & 00 & 01 & 11 & 10 \\ \hline 0 & x & x & 1 & x \\ \hline 1 & x & x & 1 & x \\ \hline \end{array}

    Grouping: KA=QBK_A = Q_B

  3. Excitation Equations

    The simplified equations for the JK inputs are:

    JC=QC‾QBJ_C = \overline{Q_C} Q_B KC=QC(QB‾+QA)K_C = Q_C (\overline{Q_B} + Q_A) JB=QA‾J_B = \overline{Q_A} KB=QCQA+QC‾QA‾K_B = Q_C Q_A + \overline{Q_C} \overline{Q_A} JA=QCJ_A = Q_C KA=QBK_A = Q_B
  4. Circuit Diagram Description

    The counter consists of three JK flip-flops (FFC,FFB,FFAFF_C, FF_B, FF_A) connected to a common clock signal.

    • JCJ_C is connected to the output of an AND gate with inputs QC‾\overline{Q_C} and QBQ_B.
    • KCK_C is connected to the output of an AND gate with inputs QCQ_C and the output of an OR gate. The OR gate's inputs are QB‾\overline{Q_B} and QAQ_A.
    • JBJ_B is connected to QA‾\overline{Q_A}.
    • KBK_B is connected to the output of an XNOR gate with inputs QCQ_C and QAQ_A. (Alternatively, two AND gates and one OR gate: (QC⋅QA)+(QC‾⋅QA‾)(Q_C \cdot Q_A) + (\overline{Q_C} \cdot \overline{Q_A})).
    • JAJ_A is connected to QCQ_C.
    • KAK_A is connected to QBQ_B.

Part c

A flip-flop is a fundamental digital circuit that can store one bit of binary information (either a 0 or a 1). It is a bistable multivibrator, meaning it has two stable states and can remain in either state indefinitely until an external trigger signal, such as a clock pulse, causes it to change. Flip-flops are the basic memory elements used in sequential logic circuits like registers, counters, and memory units.

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