Design full address using two half adder

Connect inputs A and B to the first half adder.

• The sum output of HA1 will be $\text{S}_1 = \text{A} \oplus \text{B}$.
• The carry output of HA1 will be $\text{C}_1 = \text{A} \cdot \text{B}$.

Connect the sum output of HA1 ($\text{S}_1$) and the Carry-in ($\text{C}_{\text{in}}$) to the second half adder.

• The sum output of HA2 will be $\text{S}_2 = \text{S}_1 \oplus \text{C}_{\text{in}} = (\text{A} \oplus \text{B}) \oplus \text{C}_{\text{in}}$. This is the final Sum output of the full adder.
• The carry output of HA2 will be $\text{C}_2 = \text{S}_1 \cdot \text{C}_{\text{in}} = (\text{A} \oplus \text{B}) \cdot \text{C}_{\text{in}}$.

The final Carry-out ($\text{C}_{\text{out}}$) of the full adder is obtained by ORing the carry outputs from both half adders.

• Connect $\text{C}_1$ (from HA1) and $\text{C}_2$ (from HA2) to an OR gate.
• The output of the OR gate will be $\text{C}_{\text{out}} = \text{C}_1 + \text{C}_2 = (\text{A} \cdot \text{B}) + ((\text{A} \oplus \text{B}) \cdot \text{C}_{\text{in}})$. This is the final Carry-out output of the full adder.

The full adder design using two half adders and one OR gate is:

• Inputs: A, B, $\text{C}_{\text{in}}$
• Outputs: Sum, $\text{C}_{\text{out}}$

The final circuit diagram would show:

1. HA1 with inputs A and B.
2. HA2 with inputs $\text{HA1}_{\text{Sum}}$ and $\text{C}_{\text{in}}$.
3. An OR gate with inputs $\text{HA1}_{\text{Carry}}$ and $\text{HA2}_{\text{Carry}}$.
4. The output of HA2's sum is the Full Adder's Sum.
5. The output of the OR gate is the Full Adder's $\text{C}_{\text{out}}$.